Analog Bits today announced availability of front-end design kits which enable use of low power IP on TSMC's latest 7nm process nodes. These design kits provide customers with early access to Analog Bits' latest low-power IP for SERDES, PLL, PVT sensors and POR - which are already shipping in other TSMC nodes such as 16FFC and 16FFP which will be demonstrated at the Symposium.
Multi-protocol SERDES and PVT Sensors have become an integral part of many modern SOCs, with applications including Mobile, HPC, Automotive and IoT. Analog Bits' success in delivering low-power and flexible IP means customers can get maximum differentiation in their SOC implementations.
