Cadence Design Systems announced the new Cadence Tensilica Fusion digital signal processor (DSP) based on the proven Xtensa Customizable Processor. This scalable DSP is ideal for applications requiring merged controller plus DSP computation, ultra-low energy and a small footprint. It can be designed into systems on chip (SoCs) for wearable activity monitoring, indoor navigation, context-aware sensor fusion, secure local wireless connectivity, face trigger, voice trigger and voice recognition. Optional Instruction Set Architecture (ISA) extensions are included to accelerate multiple wireless protocols including Bluetooth Low Energy, Thread and Zigbee using IEEE 802.15.4, SmartGrid 802.15.4g, Wi-Fi 802.11n and 802.11ah, 2G and LTE Category 0 release 12 and 13, and global navigation satellite systems (GNSS).
The Tensilica Fusion DSP sets a new ultra-low-power benchmark using 25 percent less energy, based on running a power diagnostic derived from the Sensory Truly Handsfree? always-on algorithm, when compared to the current low-power Cadence Tensilica HiFi Mini DSP.
The Tensilica Fusion DSP combines an enhanced 32-bit Xtensa control processor with market-leading base DSP features and flexible algorithm-specific acceleration for a fully programmable approach, supporting multiple existing and developing standards and customer algorithms. Many IoT applications are space- and energy-constrained, but still require advanced sensor processing, wireless communications and control. IoT device designers can configure just the options they need using the Xtensa Processor Generator to create an optimized Tensilica Fusion processor.
The Tensilica Fusion DSP combines flexible hardware choices with a library of DSP functions and more than 150 audio/voice/fusion applications from over 70 partners. It also shares the Tensilica partner ecosystem for other applications software, emulation and probes, silicon and services, and much more. The Tensilica Xtensa architecture is the second most popular licensable processor architecture, shipping at a rate of over 2B cores per year in products spanning sensors to supercomputers.
Tensilica Fusion DSP configurable elements include:
－ Tightly integrated floating point
－ 1-4 MACs supporting real and complex operations
－ AES-128 encryption
－ Flexible memory architecture
－ MAC and PHY algorithm acceleration
－ Audio/voice compatibility with the Tensilica HiFi architecture
