Altera Corporation announced the demonstration of its FPGA technology based on Intel’s 14 nm Tri-Gate process. The 14 nm-based FPGA test chips incorporate key intellectual property (IP) components – transceivers, mixed-signal IP and digital logic – used in Stratix 10 FPGAs and SoCs.
“Today’s news marks a significant milestone for Altera and for our customers,” said Brad Howe, senior vice president of research and development at Altera.
“Testing vital elements of our FPGAs in 14 nm Tri-Gate silicon allows us to validate device performance early in the design process and significantly accelerate the availability of our 14 nm-based products.”
Altera leverages a comprehensive test chip program to de-risk the rollout of all its next-generation products by validating how Altera IP performs using innovative process improvements and circuit design techniques prior to final product tape out.
Through the use of multiple14-nm devices, Altera continues to see very positive results in the high-speed transceiver circuitry, digital logic and hard-IP blocks that will be used in Stratix 10 FPGAs and SoCs.
Intel offers a true die shrink with its second-generation 14 nm Tri-Gate process, relative to alternative FinFET technologies. As a result, Altera will deliver unmatched performance, power, density and cost advantages with its next-generation FPGAs and SoCs.
“Altera and Intel have accomplished many significant milestones since we announced our foundry relationship in 2013 and today’s announcement is yet another defining moment in our partnership with Altera,” said Sunit Rikhi, vice president and general manager, Intel Custom Foundry.
“Successfully demonstrating the functionality of Altera’s FPGA technology using our 14 nm Tri-Gate process is a testament to the outstanding work Altera’s team has done with our foundry team.”
